18 search results - page 2 / 4 » Lowering Power Consumption in Clock by Using Globally Asynch... |
ASYNC
2002
IEEE
13 years 10 months ago
2002
IEEE
In a circuit environment that is becoming increasingly sensitive to dynamic power dissipation and noise, and where cycle time available for control decisions continues to decrease...
HPCC
2007
Springer
13 years 11 months ago
2007
Springer
Abstract. Low-power design became crucial with the widespread use of the embedded systems, where a small battery has to last for a long period. The embedded processors need to ef...
ISLPED
2005
ACM
13 years 11 months ago
2005
ACM
Due to difficulties in distributing a single global clock signal over increasingly large chip areas, a globally asynchronous, locally synchronous design is considered a promising ...
ISLPED
2003
ACM
13 years 10 months ago
2003
ACM
Enabled by the continuous advancement in fabrication technology, present day synchronous microprocessors include more than 100 million transistors and have clock speeds well in ex...
SENSYS
2009
ACM
14 years 3 days ago
2009
ACM
Clock synchronization is highly desirable in many sensor networking applications. It enables event ordering, coordinated actuation, energy-efficient communication and duty cyclin...