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CHES
2007
Springer
94views Cryptology» more  CHES 2007»
13 years 11 months ago
MAME: A Compression Function with Reduced Hardware Requirements
This paper describes a new compression function, MAME designed for hardware-oriented hash functions which can be used in applications reduced hardware requirements. MAME takes a 25...
Hirotaka Yoshida, Dai Watanabe, Katsuyuki Okeya, J...
DFT
2006
IEEE
203views VLSI» more  DFT 2006»
13 years 11 months ago
Self Testing SoC with Reduced Memory Requirements and Minimized Hardware Overhead
This paper describes a methodology of creating a built-in diagnostic system of a System on Chip and experimental results of the system application on the AT94K FPSLIC with cores d...
Ondrej Novák, Zdenek Plíva, Jiri Jen...
DCC
2008
IEEE
13 years 6 months ago
Design and Implementation of a High-Performance Microprocessor Cache Compression Algorithm
Researchers have proposed using hardware data compression units within the memory hierarchies of microprocessors in order to improve performance, energy efficiency, and functional...
Xi Chen, Lei Yang, Haris Lekatsas, Robert P. Dick,...
FSE
2011
Springer
218views Cryptology» more  FSE 2011»
12 years 8 months ago
Practical Near-Collisions and Collisions on Round-Reduced ECHO-256 Compression Function
In this paper, we present new results on the second-round SHA-3 candidate ECHO. We describe a method to construct a collision in the compression function of ECHO-256 reduced to fou...
Jérémy Jean, Pierre-Alain Fouque
DATE
1998
IEEE
110views Hardware» more  DATE 1998»
13 years 9 months ago
Scheduling and Module Assignment for Reducing Bist Resources
Built-in self-test BIST techniques modify functional hardware to give a data path the capability to test itself. The modi cation of data path registers into registers BIST resourc...
Ishwar Parulkar, Sandeep K. Gupta, Melvin A. Breue...