44 search results - page 7 / 9 » MOS VLSI circuit simulation by hardware accelerator using se... |
DFT
2005
IEEE
13 years 11 months ago
2005
IEEE
A new jitter model is developed using Matlab and Spice to analyze Data Dependent Jitter (DDJ) in serial data integrated circuits. The simulation results show that DDJ is dependent...
FCCM
2007
IEEE
14 years 3 days ago
2007
IEEE
— Modern advances in reconfigurable analog technologies are allowing field-programmable analog arrays (FPAAs) to dramatically grow in size, flexibility, and usefulness. This p...
DAC
2005
ACM
14 years 6 months ago
2005
ACM
In this work, we propose a new paradigm called power emulation, which exploits hardware acceleration to drastically speedup power estimation. Power emulation is based on the obser...
ACMSE
2006
ACM
13 years 11 months ago
2006
ACM
Applications involving interactive modeling of deformable objects require highly iterative, floating-point intensive numerical simulations. As the complexity of these models incr...
ASPDAC
2000
ACM
13 years 10 months ago
2000
ACM
- This paper presents a new aged timing simulation methodology that can be used for hot-carrier reliability assurance of VLSI. This methodology consists of a compact model and a un...