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» Making cyclic circuits acyclic
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ICCAD
1994
IEEE
117views Hardware» more  ICCAD 1994»
13 years 10 months ago
Optimization of critical paths in circuits with level-sensitive latches
A simple extension of the critical path method is presented which allows more accurate optimization of circuits with level-sensitive latches. The extended formulation provides a s...
Timothy M. Burks, Karem A. Sakallah
VLSID
2005
IEEE
255views VLSI» more  VLSID 2005»
14 years 6 months ago
Estimation of Switching Activity in Sequential Circuits Using Dynamic Bayesian Networks
We propose a novel, non-simulative, probabilistic model for switching activity in sequential circuits, capturing both spatio-temporal correlations at internal nodes and higher ord...
Sanjukta Bhanja, Karthikeyan Lingasubramanian, N. ...
DAC
2007
ACM
14 years 6 months ago
Multiprocessor Resource Allocation for Throughput-Constrained Synchronous Dataflow Graphs
Abstract. Embedded multimedia systems often run multiple time-constrained applications simultaneously. These systems use multiprocessor systems-on-chip of which it must be guarante...
Sander Stuijk, Twan Basten, Marc Geilen, Henk Corp...
IEE
2007
104views more  IEE 2007»
13 years 5 months ago
Complete distributed garbage collection using DGC-consistent cuts and .NET AOP-support
: The memory management of distributed objects, when done manually, is an error-prone task. It leads to memory leaks and dangling references, causing applications to fail. Avoiding...
Luís Veiga, P. Pereira, Paulo Ferreira
PODS
2007
ACM
159views Database» more  PODS 2007»
14 years 5 months ago
Generalized hypertree decompositions: np-hardness and tractable variants
The generalized hypertree width GHW(H) of a hypergraph H is a measure of its cyclicity. Classes of conjunctive queries or constraint satisfaction problems whose associated hypergr...
Georg Gottlob, Thomas Schwentick, Zoltán Mi...