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» Mapping of DSP Algorithms on the MONTIUM Architecture
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FPL
2007
Springer
96views Hardware» more  FPL 2007»
13 years 11 months ago
Implementation of a 2-D 8x8 IDCT on the Reconfigurable Montium Core
This paper describes the mapping of a two-dimensional inverse discrete cosine transform (2-D IDCT) onto a wordlevel reconfigurable Montium R processor. This shows that the IDCT i...
Lodewijk T. Smit, Gerard K. Rauwerda, Albert Molde...
ERSA
2006
98views Hardware» more  ERSA 2006»
13 years 6 months ago
Hydra: An Energy-efficient and Reconfigurable Network Interface
Abstract-- In heterogeneous tiled System-on-Chip architectures a Network-on-Chip is used to transport messages between processing elements. A reconfigurable network interface is us...
Marcel D. van de Burgwal, Gerard J. M. Smit, Gerar...
APCSAC
2003
IEEE
13 years 10 months ago
Mapping Applications to a Coarse Grain Reconfigurable System
This paper introduces a method which can be used to map applications written in a high level source language program, like C, to a coarse grain reconfigurable architecture, MONTIU...
Yuanqing Guo, Gerard J. M. Smit, Hajo Broersma, Mi...
DSD
2010
IEEE
141views Hardware» more  DSD 2010»
13 years 2 months ago
Adaptive Beamforming Using the Reconfigurable MONTIUM TP
Until a decade ago, the concept of phased array beamforming was mainly implemented with mechanical or analog solutions. Today, digital hardware has become powerful enough to perfor...
Marcel D. van de Burgwal, Kenneth C. Rovers, Koen ...