66 search results - page 3 / 14 » Masking timing errors on speed-paths in logic circuits |
ICCAD
2004
IEEE
14 years 2 months ago
2004
IEEE
— A radiation hardening technique for combinational logic circuits is described. The key idea is to exploit the asymmetric logical masking probabilities of gates, hardening gates...
TASLP
2002
13 years 5 months ago
2002
This paper presents a new audio coder that includes two techniques to improve the sound quality of the audio coding system. First, a forward masking model is proposed. This model e...
DSD
2007
IEEE
13 years 11 months ago
2007
IEEE
With continuing increase in soft error rates, its foreseeable that multiple faults will eventually need to be considered when modeling circuit sensitivity and evaluating faulttole...
JOLPE
2010
13 years 3 months ago
2010
This paper presents a low-power soft error-hardened latch suitable for reliable circuit operation. The proposed circuit uses redundant feedback loop to protect latch against soft e...
ICCAD
2006
IEEE
14 years 2 months ago
2006
IEEE
Soft errors in logic are emerging as a significant reliability problem for VLSI designs. This paper presents novel circuit optimization techniques to mitigate soft error rates (SE...