26 search results - page 1 / 6 » Maximizing Performance by Retiming and Clock Skew Scheduling |
DAC
1999
ACM
14 years 5 months ago
1999
ACM
DATE
1999
IEEE
13 years 9 months ago
1999
IEEE
This paper investigates retiming and clock skew scheduling for improving the tolerance of synchronous circuits to delay variations. It is shown that when both long and short paths...
TCAD
2002
13 years 4 months ago
2002
Abstract--This paper investigates the application of simultaneous retiming and clock scheduling for optimizing synchronous circuits under setup and hold constraints. Two optimizati...
ASPDAC
2007
ACM
13 years 8 months ago
2007
ACM
Clock skew scheduling is a technique that intentionally introduces skews to memory elements to improve the performance of a sequential circuit. It was shown in [21] that the full ...
DAC
2005
ACM
14 years 5 months ago
2005
ACM
The race conditions often limit the smallest feasible clock period that the optimal clock skew scheduling can achieve. Therefore, the combination of clock skew scheduling and dela...