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PPOPP
2006
ACM
12 years 7 months ago
McRT-STM: a high performance software transactional memory system for a multi-core runtime
Applications need to become more concurrent to take advantage of the increased computational power provided by chip level multiprocessing. Programmers have traditionally managed t...
Bratin Saha, Ali-Reza Adl-Tabatabai, Richard L. Hu...
HIPEAC
2009
Springer
12 years 6 months ago
Steal-on-Abort: Improving Transactional Memory Performance through Dynamic Transaction Reordering
Abstract. In transactional memory, aborted transactions reduce performance, and waste computing resources. Ideally, concurrent execution of transactions should be optimally ordered...
Mohammad Ansari, Mikel Luján, Christos Kots...
HIPEAC
2010
Springer
12 years 3 months ago
Improving Performance by Reducing Aborts in Hardware Transactional Memory
The optimistic nature of Transactional Memory (TM) systems can lead to the concurrent execution of transactions that are later found to conflict. Conflicts degrade scalability, a...
Mohammad Ansari, Behram Khan, Mikel Luján, ...
ISCA
2008
IEEE
165views Hardware» more  ISCA 2008»
12 years 8 months ago
Using Hardware Memory Protection to Build a High-Performance, Strongly-Atomic Hybrid Transactional Memory
We demonstrate how fine-grained memory protection can be used in support of transactional memory systems: first showing how a software transactional memory system (STM) can be m...
Lee Baugh, Naveen Neelakantam, Craig B. Zilles
ICPP
2008
IEEE
12 years 8 months ago
Scalable Techniques for Transparent Privatization in Software Transactional Memory
—We address the recently recognized privatization problem in software transactional memory (STM) runtimes, and introduce the notion of partially visible reads (PVRs) to heuristic...
Virendra J. Marathe, Michael F. Spear, Michael L. ...
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