Sciweavers

68 search results - page 3 / 14
» McRT-STM: a high performance software transactional memory s...
Sort
View
DAC
2011
ACM
12 years 4 months ago
Process-level virtualization for runtime adaptation of embedded software
Modern processor architectures call for software that is highly tuned to an unpredictable operating environment. Processlevel virtualization systems allow existing software to ada...
Kim M. Hazelwood
EUROSYS
2007
ACM
14 years 1 months ago
STMBench7: a benchmark for software transactional memory
Software transactional memory (STM) is a promising technique for controlling concurrency in modern multi-processor architectures. STM aims to be more scalable than explicit coarse...
Rachid Guerraoui, Michal Kapalka, Jan Vitek
ICPPW
2002
IEEE
13 years 9 months ago
SNOW: Software Systems for Process Migration in High-Performance, Heterogeneous Distributed Environments
This paper reports our experiences on the Scalable Network Of Workstation (SNOW) project, which implements a novel methodology to support user-level process migration for traditio...
Kasidit Chanchio, Xian-He Sun
CC
2006
Springer
182views System Software» more  CC 2006»
13 years 8 months ago
Selective Runtime Memory Disambiguation in a Dynamic Binary Translator
Abstract. Alias analysis, traditionally performed statically, is unsuited for a dynamic binary translator (DBT) due to incomplete control-flow information and the high complexity o...
Bolei Guo, Youfeng Wu, Cheng Wang, Matthew J. Brid...
MICRO
2010
IEEE
202views Hardware» more  MICRO 2010»
12 years 11 months ago
Hardware Support for Relaxed Concurrency Control in Transactional Memory
Today's transactional memory systems implement the two-phase-locking (2PL) algorithm which aborts transactions every time a conflict happens. 2PL is a simple algorithm that pr...
Utku Aydonat, Tarek S. Abdelrahman