33 search results - page 1 / 7 » Memory Bandwidth Limitations of Future Microprocessors |
ISCA
1996
IEEE
13 years 9 months ago
1996
IEEE
This paper makes the case that pin bandwidth will be a critical consideration for future microprocessors. We show that many of the techniques used to tolerate growing memory laten...
VLSID
2010
IEEE
13 years 3 months ago
2010
IEEE
The emerging three-dimensional (3D) chip architectures, with their intrinsic capability of reducing the wire length, is one of the promising solutions to mitigate the interconnect...
DSN
2005
IEEE
13 years 6 months ago
2005
IEEE
The increasing transient fault rate will necessitate onchip fault tolerance techniques in future processors. The speed gap between the processor and the memory is also increasing,...
ICCD
2008
IEEE
14 years 1 months ago
2008
IEEE
—In this paper we examine techniques for increasing the effective bandwidth of the microprocessor offchip interconnect. We focus on mechanisms that are orthogonal to other techni...
APCSAC
2000
IEEE
13 years 9 months ago
2000
IEEE
This paper briefly reviews the current research into RISC microprocessor architecture, which now seems to be so complex as to make the acronym somewhat of an oxymoron. In response...