34 search results - page 2 / 7 » Memory Model = Instruction Reordering Store Atomicity |
ISCA
2007
IEEE
13 years 11 months ago
2007
IEEE
While Sequential Consistency (SC) is the most intuitive memory consistency model and the one most programmers likely assume, current multiprocessors do not support it. Instead, th...
HPCA
1995
IEEE
13 years 8 months ago
1995
IEEE
In this paper we consider several hardware implementations of the general-purpose atomic primitives fetch and Φ, compare and swap, load linked, and store conditionalon large-scal...
IEEEPACT
2002
IEEE
13 years 10 months ago
2002
IEEE
Many modern embedded processors (esp. DSPs) support partitioned memory banks (also called X-Y memory or dual bank memory) along with parallel load/store instructions to achieve co...
CORR
2011
Springer
13 years 9 days ago
2011
Springer
The memory consistency model is a fundamental system property characterizing a multiprocessor. The relative merits of strict versus relaxed memory models have been widely debated ...
CAV
2010
Springer
13 years 9 months ago
2010
Springer
Well-defined memory consistency models are necessary for writing correct parallel software. Developing and understanding formal specifications of hardware memory models is a chal...