BulkSC: bulk enforcement of sequential consistency

While Sequential Consistency (SC) is the most intuitive memory consistency model and the one most programmers likely assume, current multiprocessors do not support it. Instead, they support more relaxed models that deliver high performance. SC implementations are considered either too slow or — when they can match the performance of relaxed models — too difficult to implement. In this paper, we propose Bulk Enforcement of SC (BulkSC), a novel way of providing SC that is simple to implement and offers performance comparable to Release Consistency (RC). The idea is to dynamically group sets of consecutive instructions into chunks that appear to execute atomically and in isolation. The hardware enforces SC at the coarse grain of chunks which, to the program, appears as providing SC at the individual memory access level. BulkSC keeps the implementation simple by largely decoupling memory consistency enforcement from processor structures. Moreover, it delivers high performance by enab...

• Type: Conference
• Year: 2007
• Where: ISCA
• Authors: Luis Ceze, James Tuck, Pablo Montesinos, Josep Torrellas
• Keywords: Hardware, ISCA 2007, Memory Consistency, Memory Consistency Model, Relaxed Models