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GLVLSI
1999
IEEE
63views VLSI» more  GLVLSI 1999»
13 years 9 months ago
Memory Organization of a Single-Chip Video Signal Processing System with Embedded DRAM
Jörg Hilgenstock, Klaus Herrmann, Peter Pirsc...
DFT
1999
IEEE
114views VLSI» more  DFT 1999»
13 years 9 months ago
Yield Enhancement Considerations for a Single-Chip Multiprocessor System with Embedded DRAM
A programmable single-chip multiprocessor system for video coding has been developed. The system is implemented in a high-performance 0.25 m logic/embedded DRAM process. It integr...
Markus Rudack, Dirk Niggemeyer
CSREAESA
2006
13 years 6 months ago
A Dual-core Embedded System-on-Chip Architecture for Multimedia Signal Processing Applications
- This paper presents a dual-core embedded System-on-Chip for a wide range of application fields with particularly high processing demands, including general signal processing, vid...
Hong Yue, Kui Dai, Zhiying Wang
ARVLSI
1997
IEEE
105views VLSI» more  ARVLSI 1997»
13 years 9 months ago
An Embedded DRAM for CMOS ASICs
The growing gap between on-chip gates and off-chip I/O bandwidth argues for ever larger amounts of on-chip memory. Emerging portable consumer technology, such as digital cameras, ...
John Poulton
ICIP
2000
IEEE
14 years 6 months ago
Performance Analysis of an H.263 Video Encoder for VIRAM
VIRAM (Vector Intelligent Random Access Memory) is a vector architecture processor with embedded memory, designed for portable multimedia processing devices. Its vector processing...
Thinh P. Q. Nguyen, Avideh Zakhor, Katherine A. Ye...