Sciweavers

93 search results - page 17 / 19
» Memory Placement Techniques for Parallel Association Mining
Sort
View
CCGRID
2010
IEEE
13 years 6 months ago
Team-Based Message Logging: Preliminary Results
Fault tolerance will be a fundamental imperative in the next decade as machines containing hundreds of thousands of cores will be installed at various locations. In this context, ...
Esteban Meneses, Celso L. Mendes, Laxmikant V. Kal...
ICCD
2006
IEEE
97views Hardware» more  ICCD 2006»
14 years 2 months ago
Pesticide: Using SMT Processors to Improve Performance of Pointer Bug Detection
Pointer bugs associated with dynamically-allocated objects resulting in out-of-bounds memory access are an important class of software bugs. Because such bugs cannot be detected e...
Jin-Yi Wang, Yen-Shiang Shue, T. N. Vijaykumar, Sa...
HPCA
2009
IEEE
14 years 6 months ago
A novel architecture of the 3D stacked MRAM L2 cache for CMPs
Magnetic Random Access Memory (MRAM) is considered to be a promising future memory technology due to its low leakage power, high density and fast read speed. The heterogeneous int...
Guangyu Sun, Xiangyu Dong, Yuan Xie, Jian Li, Yira...
SDM
2007
SIAM
143views Data Mining» more  SDM 2007»
13 years 7 months ago
Less is More: Compact Matrix Decomposition for Large Sparse Graphs
Given a large sparse graph, how can we find patterns and anomalies? Several important applications can be modeled as large sparse graphs, e.g., network traffic monitoring, resea...
Jimeng Sun, Yinglian Xie, Hui Zhang, Christos Falo...
CASES
2006
ACM
13 years 11 months ago
High-level languages for small devices: a case study
In this paper we study, through a concrete case, the feasibility of using a high-level, general-purpose logic language in the design and implementation of applications targeting w...
Manuel Carro, José F. Morales, Henk L. Mull...