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ATS
2001
IEEE
172views Hardware» more  ATS 2001»
13 years 9 months ago
A Built-in Self-Test and Self-Diagnosis Scheme for Heterogeneous SRAM Clusters
Testing and diagnosis are important issues in system-onchip (SOC) development, as more and more embedded cores are being integrated into the chips. In this paper we propose a buil...
Chih-Wea Wang, Ruey-Shing Tzeng, Chi-Feng Wu, Chih...
ETS
2006
IEEE
119views Hardware» more  ETS 2006»
13 years 11 months ago
On-Chip Test Generation Using Linear Subspaces
A central problem in built-in self test (BIST) is how to efficiently generate a small set of test vectors that detect all targeted faults. We propose a novel solution that uses l...
Ramashis Das, Igor L. Markov, John P. Hayes
DATE
2008
IEEE
131views Hardware» more  DATE 2008»
13 years 11 months ago
Optimal High-Resolution Spectral Analyzer
This paper presents a new application field for the Goertzel algorithm. The test of mixed-signal circuits involves the generation and analysis of signals. A standard method for th...
A. Tchegho, Heinz Mattes, Sebastian Sattler
SAC
2002
ACM
13 years 5 months ago
An evolutionary algorithm for reducing integrated-circuit test application time
The cost for testing integrated circuits represents a growing percentage of the total cost for their production. The former strictly depends on the length of the test session, and...
Fulvio Corno, Matteo Sonza Reorda, Giovanni Squill...
ITC
2003
IEEE
149views Hardware» more  ITC 2003»
13 years 10 months ago
On Reducing Aliasing Effects and Improving Diagnosis of Logic BIST Failures
Diagnosing failing vectors in a Built-In Self Test (BIST) environment is a difficult task because of the highly compressed signature coming out of the Multiple Input Shift Regist...
Ramesh C. Tekumalla