128 search results - page 24 / 26 » Microprocessor Based Testing for Core-Based System on Chip |
FPL
2009
Springer
13 years 10 months ago
2009
Springer
In this paper we present a verification platform designed for HyperTransport 3.x (HT3) applications. HyperTransport 3.x is a very low latency and high bandwidth chip-tochip interc...
JPDC
2000
13 years 5 months ago
2000
: SIMD arrays are likely to become increasingly important as coprocessors in domain specific systems as architects continue to leverage RAM technology in their design. The problem ...
ISPASS
2010
IEEE
14 years 27 days ago
2010
IEEE
—The ongoing move to chip multiprocessors (CMPs) permits greater sharing of last-level cache by processor cores but this sharing aggravates the cache contention problem, potentia...
DSD
2004
IEEE
13 years 9 months ago
2004
IEEE
Validation of programmable architectures, consisting of processor cores, coprocessors, and memory subsystems, is one of the major bottlenecks in current Systemon-Chip design metho...
ISLPED
1995
ACM
13 years 9 months ago
1995
ACM
Analog techniques can lead to ultra-efficient computational systems when applied to the right applications. The problem of associative memory is well suited to array-based analog ...