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GLVLSI
2002
IEEE
109views VLSI» more  GLVLSI 2002»
10 years 8 months ago
Minimizing resources in a repeating schedule for a split-node data-flow graph
Many computation-intensive or recursive applications commonly found in digital signal processing and image processing applications can be represented by data-flow graphs (DFGs). ...
Timothy W. O'Neil, Edwin Hsing-Mean Sha
JEC
2006
61views more  JEC 2006»
10 years 2 months ago
Time-constrained loop scheduling with minimal resources
Many applications commonly found in digital signal processing and image processing applications can be represented by data-flow graphs (DFGs). In our previous work, we proposed a ...
Timothy W. O'Neil, Edwin Hsing-Mean Sha
ASPDAC
2005
ACM
109views Hardware» more  ASPDAC 2005»
10 years 8 months ago
Optimal module and voltage assignment for low-power
– Reducing power consumption through high-level synthesis has attracted a growing interest from researchers due to its large potential for power reduction. In this work we study ...
Deming Chen, Jason Cong, Junjuan Xu
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