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VLSID
2002
IEEE
151views VLSI» more  VLSID 2002»
14 years 5 months ago
Mode Selection and Mode-Dependency Modeling for Power-Aware Embedded Systems
Among the many techniques for system-level power management, it is not currently possible to guarantee timing constraints and have a comprehensive system model at the same time. S...
Dexin Li, Pai H. Chou, Nader Bagherzadeh
HIPEAC
2005
Springer
13 years 10 months ago
Power Aware External Bus Arbitration for System-on-a-Chip Embedded Systems
Abstract. Power efficiency has become a key design trade-off in embedded system designs. For system-on-a-chip embedded systems, an external bus interconnects embedded processor co...
Ke Ning, David R. Kaeli
VLDB
1990
ACM
77views Database» more  VLDB 1990»
13 years 9 months ago
Efficient Main Memory Data Management Using the DBGraph Storage Model
Therequirementsfor amain memorydatastoragemodel are both compactnessand efficient processing for all database operations. The DBGraph storage model, proposed in this paper, achiev...
Philippe Pucheral, Jean-Marc Thévenin, Patr...
IPPS
1998
IEEE
13 years 9 months ago
Measuring the Vulnerability of Interconnection Networks in Embedded Systems
Studies of the fault-tolerance of graphs have tended to largely concentrate on classical graph connectivity. This measure is very basic, and conveys very little information for des...
Vijay Lakamraju, Zahava Koren, Israel Koren, C. Ma...
EUROMICRO
1999
IEEE
13 years 9 months ago
An Improved Scheduling Technique for Time-Triggered Embedded Systems
In this paper we present an improved scheduling technique for the synthesis of time-triggered embedded systems. Our system model captures both the flow of data and that of control...
Paul Pop, Petru Eles, Zebo Peng