24 search results - page 5 / 5 » Model Order Reduction of Large Circuits Using Balanced Trunc... |
ISCAS
2007
IEEE
13 years 12 months ago
2007
IEEE
— Due to continuous technology scaling, the reduction of nodal capacitances and the lowering of power supply voltages result in an ever decreasing minimal charge capable of upset...
ISQED
2008
IEEE
14 years 2 days ago
2008
IEEE
The effects of random variations during the manufacturing process on devices can be simulated as a variation of transistor parameters. Device degradation, due to temperature or vo...
DAC
2005
ACM
14 years 6 months ago
2005
ACM
el Predicate Abstraction and Refinement for Verifying RTL Verilog Himanshu Jain CMU SCS, Pittsburgh, PA 15213 Daniel Kroening ETH Z?urich, Switzerland Natasha Sharygina CMU SCS an...
ASIACRYPT
2006
Springer
13 years 9 months ago
2006
Springer
Non-interactive zero-knowledge proofs play an essential role in many cryptographic protocols. We suggest several NIZK proof systems based on prime order groups with a bilinear map...