Sciweavers

288 search results - page 2 / 58
» Model checking SystemC designs using timed automata
Sort
View
DATE
2006
IEEE
117views Hardware» more  DATE 2006»
13 years 11 months ago
Formal verification of systemc designs using a petri-net based representation
This paper presents an effective approach to formally verify SystemC designs. The approach translates SystemC models into a Petri-Net based representation. The Petri-net model is ...
Daniel Karlsson, Petru Eles, Zebo Peng
FORMATS
2006
Springer
13 years 9 months ago
Model Checking Timed Automata with Priorities Using DBM Subtraction
In this paper we describe an extension of timed automata with priorities, and efficient algorithms to compute subtraction on DBMs (difference bounded matrices), needed in symbolic ...
Alexandre David, John Håkansson, Kim Guldstr...
ASPDAC
2006
ACM
131views Hardware» more  ASPDAC 2006»
13 years 11 months ago
POSIX modeling in SystemC
- Early estimation of the execution time of Real-Time embedded SW is an essential task in complex, HW/SW embedded system design. Application SW execution time estimation requires t...
Hector Posadas, Jesús Ádamez, Pablo ...
DATE
2005
IEEE
155views Hardware» more  DATE 2005»
13 years 11 months ago
RTK-Spec TRON: A Simulation Model of an ITRON Based RTOS Kernel in SystemC
This paper presents the methodology and the modeling constructs we have developed to capture the real time aspects of RTOS simulation models in a System Level Design Language (SLD...
M. Abdelsalam Hassan, Keishi Sakanushi, Yoshinori ...
FUIN
2007
104views more  FUIN 2007»
13 years 5 months ago
SAT-Based Reachability Checking for Timed Automata with Discrete Data
Reachability analysis for timed automata using SAT-based methods was considered in many papers, occurring to be a very efficient model checking technique. In this paper we show ho...
Andrzej Zbrzezny, Agata Pólrola