28 search results - page 5 / 6 » Modeled and Measured Instruction Fetching Performance for Su... |
ISPASS
2005
IEEE
13 years 11 months ago
2005
IEEE
Performance evaluation using only a subset of programs from a benchmark suite is commonplace in computer architecture research. This is especially true during early design space e...
ISCA
2002
IEEE
13 years 10 months ago
2002
IEEE
This paper presents the Alpha EV8 conditional branch predictor. The Alpha EV8 microprocessor project, canceled in June 2001 in a late phase of development, envisioned an aggressiv...
CODES
2005
IEEE
13 years 11 months ago
2005
IEEE
Design of programmable processors and embedded applications requires instruction-set simulators for early exploration and validation of candidate architectures. Interpretive simul...
ISPASS
2006
IEEE
13 years 11 months ago
2006
IEEE
Current simulation-sampling techniques construct accurate model state for each measurement by continuously warming large microarchitectural structures (e.g., caches and the branch...
ISCA
2007
IEEE
14 years 2 days ago
2007
IEEE
ACE analysis is a technique to provide an early reliability estimate for microprocessors. ACE analysis couples data from performance models with low level design details to identi...