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DATE
2003
IEEE
76views Hardware» more  DATE 2003»
13 years 10 months ago
Modeling Noise Transfer Characteristic of Dynamic Logic Gates
Dynamic noise analysis is recently gaining more attention as a definitive method to overcome glaring deficiencies of static noise analysis. Exact dynamic noise analysis requires...
Li Ding 0002, Pinaki Mazumder
ANSS
2003
IEEE
13 years 10 months ago
Internode: Internal Node Logic Computational Model
In this work, we present a computational behavioral model for logic gates called Internode (Internal Node Logic Computational Model) that considers the functionality of the gate a...
Alejandro Millán, Manuel J. Bellido, Jorge ...
DAC
2000
ACM
14 years 5 months ago
Dynamic noise analysis in precharge-evaluate circuits
A dynamic noise model is developed and applied to analyze the noise immunity of precharge-evaluate circuits. Considering that the primary source of noise-injection in the circuit ...
Dinesh Somasekhar, Seung Hoon Choi, Kaushik Roy, Y...
ITC
1998
IEEE
120views Hardware» more  ITC 1998»
13 years 9 months ago
Test generation in VLSI circuits for crosstalk noise
This paper addresses the problem of efficiently and accurately generating two-vector tests for crosstalk induced effects, such as pulses, signal speedup and slowdown, in digital c...
Weiyu Chen, Sandeep K. Gupta, Melvin A. Breuer
ICCD
2004
IEEE
128views Hardware» more  ICCD 2004»
14 years 1 months ago
Static Transition Probability Analysis Under Uncertainty
Deterministic gate delay models have been widely used to find the transition probabilities at the nodes of a circuit for calculating the power dissipation. However, with progress...
Siddharth Garg, Siddharth Tata, Ravishankar Arunac...