—Behavioral modeling with virtual built-in self-test verification of high-speed wired link designs is described in this paper. Our procedure is based on principles of top-down mi...
Abstract--An asynchronous high-speed wave-pipelined bit-serial link for on-chip communication is presented as an alternative to standard bit-parallel links. The link employs the di...
Rostislav (Reuven) Dobkin, Michael Moyal, Avinoam ...