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DFT
2009
IEEE
189views VLSI» more  DFT 2009»
13 years 11 months ago
Analyzing Formal Verification and Testing Efforts of Different Fault Tolerance Mechanisms
Pre-fabrication design verification and post-fabrication chip testing are two important stages in the product realization process. These two stages consume a large part of resourc...
Meng Zhang, Anita Lungu, Daniel J. Sorin
FORTE
2008
13 years 6 months ago
An SMT Approach to Bounded Reachability Analysis of Model Programs
Model programs represent transition systems that are used fy expected behavior of systems at a high level of abstraction. The main application area is application-level network pro...
Margus Veanes, Nikolaj Bjørner, Alexander R...
FORTE
2009
13 years 2 months ago
Approximated Context-Sensitive Analysis for Parameterized Verification
Abstract. We propose a verification method for parameterized systems with global conditions. The method is based on context-sensitive constraints, a symbolic representation of infi...
Parosh Aziz Abdulla, Giorgio Delzanno, Ahmed Rezin...
IPPS
2006
IEEE
13 years 11 months ago
An overview of the Jahob analysis system: project goals and current status
We present an overview of the Jahob system for modular analysis of data structure properties. Jahob uses a subset of Java as the implementation language and annotations with formu...
Viktor Kuncak, Martin C. Rinard
SAS
2000
Springer
13 years 8 months ago
A Transformational Approach for Generating Non-linear Invariants
Computing invariants is the key issue in the analysis of infinite-state systems whether analysis means testing, verification or parameter synthesis. In particular, methods that all...
Saddek Bensalem, Marius Bozga, Jean-Claude Fernand...