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DATE
2003
IEEE
90views Hardware» more  DATE 2003»
13 years 10 months ago
Mapping Applications to an FPFA Tile
Abstract— This paper introduces a transformational design method which can be used to map code written in a high level source language, like C, to a coarse grain reconfigurable ...
Michèl A. J. Rosien, Yuanqing Guo, Gerard J...
CF
2004
ACM
13 years 10 months ago
The happy marriage of architecture and application in next-generation reconfigurable systems
New applications and standards are first conceived only for functional correctness and without concerns for the target architecture. The next challenge is to map them onto an arch...
Ingrid Verbauwhede, Patrick Schaumont
LCTRTS
2010
Springer
14 years 4 days ago
Operation and data mapping for CGRAs with multi-bank memory
Coarse Grain Reconfigurable Architectures (CGRAs) promise high performance at high power efficiency. They fulfil this promise by keeping the hardware extremely simple, and movi...
Yongjoo Kim, Jongeun Lee, Aviral Shrivastava, Yunh...
MJ
2006
145views more  MJ 2006»
13 years 5 months ago
A design flow for speeding-up dsp applications in heterogeneous reconfigurable systems
In this paper, we propose a method for speeding-up Digital Signal Processing applications by partitioning them between the reconfigurable hardware blocks of different granularity ...
Michalis D. Galanis, Athanasios Milidonis, Athanas...
DAC
2007
ACM
14 years 6 months ago
Program Mapping onto Network Processors by Recursive Bipartitioning and Refining
Mapping packet processing applications onto embedded network processors (NP) is a challenging task due to the unique constraints of NP systems and the characteristics of network a...
Jia Yu, Jingnan Yao, Jun Yang 0002, Laxmi N. Bhuya...