4 search results - page 1 / 1 » Multilevel flash memory on-chip error correction based on tr... |
ISCAS
2006
IEEE
13 years 10 months ago
2006
IEEE
This paper presents a multilevel (ML) Flash memory onchip error correction system design based on the concept of trellis coded modulation (TCM). This is motivated by the non-trivi...
TVLSI
2010
12 years 11 months ago
2010
By storing more than one bit in each memory cell, multi-level per cell (MLC) NAND flash memories are dominating global flash memory market due to their appealing storage density ad...
CORR
2010
Springer
12 years 11 months ago
2010
Springer
A construction using the E8 lattice and Reed-Solomon codes for error-correction in flash memory is given. Since E8 lattice decoding errors are bursty, a Reed-Solomon code over GF(2...
ISCA
2008
IEEE
13 years 11 months ago
2008
IEEE
Flash is a widely used storage device that provides high density and low power, appealing properties for general purpose computing. Today, its usual application is in portable spe...