24 search results - page 4 / 5 » Multiobjective VLSI cell placement using distributed simulat... |
IPPS
1997
IEEE
13 years 10 months ago
1997
IEEE
This paper analyses alternatives for the parallelization of the Simulated Annealing algorithm when applied to the placement of modules in a VLSI circuit considering the use of PVM...
TVLSI
2010
13 years 13 days ago
2010
The gap between VLSI technology and fabrication technology leads to strong refractive effects in lithography. Consequently, it is a huge challenge to reliably print layout features...
IEEEPACT
2008
IEEE
14 years 5 days ago
2008
IEEE
Communication overheads are one of the fundamental challenges in a multiprocessor system. As the number of processors on a chip increases, communication overheads and the distribu...
DATE
2008
IEEE
14 years 6 days ago
2008
IEEE
Power gating is one of the most effective techniques in reducing the standby leakage current of VLSI circuits. In this paper we introduce a new approach for sleep transistor sizin...
VLSID
2002
IEEE
14 years 6 months ago
2002
IEEE
One of the major roadblocks in reduction of library generation cycle time is the layout generation phase. The two methods of doing automatic layout generation are synthesis and mig...