13 search results - page 1 / 3 » Multiple Design Error Diagnosis and Correction in Digital VL... |
VTS
1999
IEEE
13 years 9 months ago
1999
IEEE
VTS
1999
IEEE
13 years 9 months ago
1999
IEEE
This paper describes an approach to design error diagnosis and correction in combinational digital circuits. Our approach targets small errors introduced during the design process...
GLVLSI
1997
IEEE
13 years 9 months ago
1997
IEEE
DFT
2003
IEEE
13 years 10 months ago
2003
IEEE
We describe a method for designing fault tolerant circuits based on an extension of a Concurrent Error Detection (CED) technique. The proposed extension combines parity check code...
GLVLSI
2008
IEEE
13 years 4 months ago
2008
IEEE
Due to the increasing complexity of today's circuits a high degree of automation in the design process is mandatory. The detection of faults and design errors is supported qu...