18 search results - page 1 / 4 » Multiplexer restructuring for FPGA implementation cost reduc... |
DAC
2005
ACM
13 years 6 months ago
2005
ACM
This paper presents a novel synthesis algorithm that reduces the area needed for implementing multiplexers on an FPGA by an average of 18%. This is achieved by reducing the number...
FPGA
2012
ACM
12 years 7 days ago
2012
ACM
In floating-point datapaths synthesized on FPGAs, the shifters that perform mantissa alignment and normalization consume a disproportionate number of LUTs. Shifters are implemente...
LATINCRYPT
2010
13 years 3 months ago
2010
We describe an FPGA accelerator for the Kannan–Fincke– Pohst enumeration algorithm (KFP) solving the Shortest Lattice Vector Problem (SVP). This is the first FPGA implementati...
FPL
2000
Springer
13 years 8 months ago
2000
Springer
Message sequencing and channel assignment are two important aspects to consider in optimizing the performance of Wavelength Division Multiplexing (WDM) networks. A scheduling techn...
CORR
2010
Springer
13 years 4 months ago
2010
Springer
MIMO (Multi Input Multi Output) wireless communication system is an innovative solution to improve the bandwidth efficiency by exploiting multipath-richness of the propagation envi...