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» Multithreaded Synchronous Data Flow Simulation
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FPL
2009
Springer
135views Hardware» more  FPL 2009»
13 years 9 months ago
Fast critical sections via thread scheduling for FPGA-based multithreaded processors
As FPGA-based systems including soft processors become increasingly common, we are motivated to better understand the architectural trade-offs and improve the efficiency of these...
Martin Labrecque, J. Gregory Steffan
HPCA
1998
IEEE
13 years 8 months ago
Non-Stalling CounterFlow Architecture
The counterflow pipeline concept was originated by Sproull et al.[1] to demonstrate the concept of asynchronous circuits. This architecture relies on distributed decision making an...
Michael F. Miller, Kenneth J. Janik, Shih-Lien Lu
IJVR
2006
178views more  IJVR 2006»
13 years 4 months ago
Scene Synchronization in Close Coupled World Representations Using SCIVE
This paper introduces SCIVE, a Simulation Core for Intelligent Virtual Environments. SCIVE provides a Knowledge Representation Layer (KRL) as a central organizing struc...
Marc Erich Latoschik, Christian Fröhlich, Ale...
DATE
2000
IEEE
121views Hardware» more  DATE 2000»
13 years 9 months ago
Composite Signal Flow: A Computational Model Combining Events, Sampled Streams, and Vectors
The composite signal flow model of computation targets systems with significant control and data processing parts. It builds on the data flow and synchronous data flow models ...
Axel Jantsch, Per Bjuréus
ASPLOS
2010
ACM
13 years 11 months ago
ParaLog: enabling and accelerating online parallel monitoring of multithreaded applications
Instruction-grain lifeguards monitor the events of a running application at the level of individual instructions in order to identify and help mitigate application bugs and securi...
Evangelos Vlachos, Michelle L. Goodstein, Michael ...