84 search results - page 16 / 17 » NBTI-Aware Synthesis of Digital Circuits |
DAC
1995
ACM
13 years 9 months ago
1995
ACM
High-level synthesis (HLS) has been successfully targeted towards the digital signal processing (DSP) domain. Both application-speci c integrated circuits (ASICs) and application-...
CONCUR
2010
Springer
13 years 6 months ago
2010
Springer
ompositionality of Round Abstraction Abstract Dan R. Ghica and Mohamed N. Menaa University of Birmingham, U.K. We revisit a technique called round abstraction as a solution to the ...
ICES
2005
Springer
13 years 11 months ago
2005
Springer
Evolvable Hardware arises as a promising solution for automatic digital synthesis of digital and analog circuits. During the last decade, a special interest has been focused on evo...
ISCAS
2005
IEEE
13 years 11 months ago
2005
IEEE
Abstract— This paper presents and evaluates a hybrid implementation of a low complexity algorithm for speech enhancement, the Adaptive Gain Equalizer (AGE). The AGE is a subband ...
FPGA
2010
ACM
14 years 3 months ago
2010
ACM
Guarded evaluation is a power reduction technique that involves identifying sub-circuits (within a larger circuit) whose inputs can be held constant (guarded) at specific times d...