264 search results - page 4 / 53 » Network-on-Chip Architecture Exploration Framework |
CODES
2001
IEEE
13 years 9 months ago
2001
IEEE
Comprehensive exploration of the design space parameters at the system-level is a crucial task to evaluate architectural tradeoffs accounting for both energy and performance const...
SIPS
2006
IEEE
13 years 11 months ago
2006
IEEE
Abstract— This paper presents a design environment for efficiently generating application-specific Intellectual Property (IP) cores for system level signal processing algorithm...
ASPDAC
2009
ACM
14 years 8 days ago
2009
ACM
Abstract— In the context of a design space exploration framework for supporting the platform-based design approach, we address the problem of robustness with respect to manufactu...
ESTIMEDIA
2004
Springer
13 years 11 months ago
2004
Springer
Abstract— This paper presents an exploration framework which performs data assignment and access scheduling exploration for applications given a multilayer memory architecture. O...
ASPDAC
2007
ACM
13 years 9 months ago
2007
ACM
The memory subsystem is a major contributor to the performance, power, and area of complex SoCs used in feature rich multimedia products. Hence, memory architecture of the embedded...