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» Neural Networks-Based Parametric Testing of Analog IC
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DFT
2002
IEEE
79views VLSI» more  DFT 2002»
13 years 10 months ago
Neural Networks-Based Parametric Testing of Analog IC
Viera Stopjaková, D. Micusík, Lubica...
DATE
2000
IEEE
136views Hardware» more  DATE 2000»
13 years 9 months ago
Parametric Fault Simulation and Test Vector Generation
Process variation has forever been the major fail cause of analog circuit where small deviations in component values cause large deviations in the measured output parameters. This...
Khaled Saab, Naim Ben Hamida, Bozena Kaminska
BMCBI
2010
106views more  BMCBI 2010»
13 years 5 months ago
Predicting MHC class I epitopes in large datasets
Background: Experimental screening of large sets of peptides with respect to their MHC binding capabilities is still very demanding due to the large number of possible peptide seq...
Kirsten Roomp, Iris Antes, Thomas Lengauer
ISCAS
2005
IEEE
191views Hardware» more  ISCAS 2005»
13 years 10 months ago
Behavioural modeling and simulation of a switched-current phase locked loop
Recent work has shown that the use of switched current methods can provide an effective route to implementation of analog IC functionality using a standard digital CMOS process. Fu...
Peter R. Wilson, Reuben Wilcock