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» Neurospaces: Towards automated model partitioning for parall...
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CASES
2006
ACM
13 years 11 months ago
High-level power analysis for multi-core chips
Technology trends have led to the advent of multi-core chips in the form of both general-purpose chip multiprocessors (CMPs) and embedded multi-processor systems-on-a-chip (MPSoCs...
Noel Eisley, Vassos Soteriou, Li-Shiuan Peh
SC
2009
ACM
13 years 9 months ago
Plasma fusion code coupling using scalable I/O services and scientific workflows
In order to understand the complex physics of mother nature, physicist often use many approximations to understand one area of physics and then write a simulation to reduce these ...
Norbert Podhorszki, Scott Klasky, Qing Liu, Cipria...
ASPLOS
2008
ACM
13 years 7 months ago
Communication optimizations for global multi-threaded instruction scheduling
The recent shift in the industry towards chip multiprocessor (CMP) designs has brought the need for multi-threaded applications to mainstream computing. As observed in several lim...
Guilherme Ottoni, David I. August