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DATE
1998
IEEE
74views Hardware» more  DATE 1998»
13 years 10 months ago
State Relaxation Based Subsequence Removal for Fast Static Compaction in Sequential Circuits
We extend the subsequence removal technique to provide signi cantly higher static compaction for sequential circuits. We show that state relaxation techniques can be used to ident...
Michael S. Hsiao, Srimat T. Chakradhar
ATS
2000
IEEE
145views Hardware» more  ATS 2000»
13 years 10 months ago
Compaction-based test generation using state and fault information
We present a new test generation procedure for sequential circuits using newly traversed state and newly detected fault information obtained between successive iterations of vecto...
Ashish Giani, Shuo Sheng, Michael S. Hsiao, Vishwa...
ICCAD
1999
IEEE
115views Hardware» more  ICCAD 1999»
13 years 10 months ago
An approach for improving the levels of compaction achieved by vector omission
We describe a method referred to as sequence counting to improve on the levels of compaction achievable by vector omission based static compaction procedures. Such procedures are ...
Irith Pomeranz, Sudhakar M. Reddy
DATE
1998
IEEE
92views Hardware» more  DATE 1998»
13 years 10 months ago
Fast Sequential Circuit Test Generation Using High-Level and Gate-Level Techniques
A new approach for sequential circuit test generation is proposed that combines software testing based techniques at the high level with test enhancement techniques at the gate le...
Elizabeth M. Rudnick, Roberto Vietti, Akilah Ellis...
ICCAD
1995
IEEE
170views Hardware» more  ICCAD 1995»
13 years 9 months ago
Acceleration techniques for dynamic vector compaction
: We present several techniques for accelerating dynamic vector compaction for combinational and sequential circuits. A key feature of all our techniques is that they significantly...
Anand Raghunathan, Srimat T. Chakradhar