17 search results - page 2 / 4 » Next Cache Line and Set Prediction |
APCSAC
2006
IEEE
13 years 11 months ago
2006
IEEE
This paper describes a new on-demand wakeup prediction policy for instruction cache leakage control that achieves better leakage savings than prior policies, and avoids the perform...
ISCA
2002
IEEE
13 years 9 months ago
2002
IEEE
Techniques for analyzing and improving memory referencing behavior continue to be important for achieving good overall program performance due to the ever-increasing performance g...
RSP
2003
IEEE
13 years 10 months ago
2003
IEEE
We describe cache architecture, intended for prototype-oriented IC platforms, that automatically finds the best cache configuration for a particular application. The cache itself ...
ICCD
2005
IEEE
14 years 1 months ago
2005
IEEE
Recent studies have shown that in highly associative caches, the performance gap between the Least Recently Used (LRU) and the theoretical optimal replacement algorithms is large,...
IEEEPACT
2002
IEEE
13 years 10 months ago
2002
IEEE
Memory performance is increasingly determining microprocessor performance and technology trends are exacerbating this problem. Most architectures use set-associative caches with L...