Sciweavers

    134 search results - page 3 / 27
    » NoC-Based FPGA: Architecture and Routing
    Sort
    View
    VLSISP
    2002
    199views more  VLSISP 2002»
    Evaluation of CORDIC Algorithms for FPGA Design
    13 years 5 months ago
    Evaluation of CORDIC Algorithms for FPGA Design
    Download  bwrc.eecs.berkeley.edu
    Abstract. This paper presents a study of the suitability for FPGA design of full custom based CORDIC implementations. Since all these methods are based on redundant arithmetic, the...
    Javier Valls, Martin Kuhlmann, Keshab K. Parhi
    claim paper
    Read More »
    DT
    1998
    85views more  DT 1998»
    How Much Logic Should Go in an FPGA Logic Block?
    13 years 5 months ago
    How Much Logic Should Go in an FPGA Logic Block?
    Download  www.eecg.toronto.edu
    The logic blocks of most modern FPGAs contain clusters of look-up tables and flip flops, yet little is known about good choices for several key architectural parameters related ...
    Vaughn Betz, Jonathan Rose
    claim paper
    Read More »
    FPGA
    2008
    ACM
    168views FPGA» more  FPGA 2008»
    Architectural improvements for field programmable counter arrays: enabling efficient synthesis of fast compressor trees on FPGAs
    13 years 6 months ago
    Architectural improvements for field programmable counter arrays: enabling efficient synthesis of fast compressor trees on FPGAs
    Download  lap.epfl.ch
    The Field Programmable Counter Array (FPCA) was introduced to improve FPGA performance for arithmetic circuits. An FPCA is a reconfigurable IP core that can be integrated into an ...
    Alessandro Cevrero, Panagiotis Athanasopoulos, Had...
    claim paper
    Read More »
    FPGA
    1999
    ACM
    142views FPGA» more  FPGA 1999»
    Multi-Terminal Net Routing for Partial Crossbar-Based Multi-FPGA Systems
    13 years 10 months ago
    Multi-Terminal Net Routing for Partial Crossbar-Based Multi-FPGA Systems
    Download  www.cecs.uci.edu
    Multi-FPGA systems are used as custom computing machines to solve compute intensive problems and also in the verification and prototyping of large circuits. In this paper, we addr...
    Abdel Ejnioui, N. Ranganathan
    claim paper
    Read More »
    FPGA
    1999
    ACM
    155views FPGA» more  FPGA 1999»
    FPGA Routing Architecture: Segmentation and Buffering to Optimize Speed and Density
    13 years 10 months ago
    FPGA Routing Architecture: Segmentation and Buffering to Optimize Speed and Density
    Download  www.eecg.toronto.edu
    In this work we investigate the routing architecture of FPGAs, focusing primarily on determining the best distribution of routing segment lengths and the best mix of pass transist...
    Vaughn Betz, Jonathan Rose
    claim paper
    Read More »
    Explore & Download
    Proceedings Preprints Top 5 Ranked Papers Publications Books Software Tutorials Presentations Lectures Notes Datasets
    Productivity Tools
    International On-screen Keyboard Graphical Social Symbols OCR Text Recognition CSS3 Style Generator Web Page to PDF Web Page to Image PDF Split PDF Merge Latex Equation Editor Sci2ools
    Document Tools
    PDF to Text PDF to Postscript PDF to Thumbnails Excel to PDF Word to PDF Postscript to PDF PowerPoint to PDF Latex to Word Repair Corrupted PDF
    Image Tools
    JPG to PS JPG to PDF Extract Images from PDF Image Converter
    Sciweavers
    About Community Cookies Privacy Policy Terms of Use

    Copyright © Sciweavers LLC, 2009-2024, USA.