69 search results - page 2 / 14 » Noise margin analysis for dynamic logic circuits |
ISLPED
2000
ACM
13 years 9 months ago
2000
ACM
A new high-speed Domino circuit, called HS-Domino is developed. HS-Domino resolves the trade-o between performance and noise margins in conventional CD-Domino logic while dissipat...
ICCAD
1998
IEEE
13 years 9 months ago
1998
IEEE
Noise can cause digital circuits to switch incorrectly and thus produce spurious results. Noise can also have adverse power, timing and reliability e ects. Dynamic logic is partic...
DATE
2008
IEEE
13 years 11 months ago
2008
IEEE
Metallic Carbon Nanotubes (CNTs) create source-drain shorts in Carbon Nanotube Field Effect Transistors (CNFETs), causing excessive leakage, degraded noise margin and delay variat...
DATE
2003
IEEE
13 years 10 months ago
2003
IEEE
Dynamic noise analysis is recently gaining more attention as a definitive method to overcome glaring deficiencies of static noise analysis. Exact dynamic noise analysis requires...
DATE
2004
IEEE
13 years 8 months ago
2004
IEEE
Noise affects circuit operation by increasing gate delays and causing latches to capture incorrect values. Noise analysis techniques can detect some of such noise faults, but accu...