339 search results - page 2 / 68 » Noise-tolerant dynamic circuit design |
VTS
2007
IEEE
13 years 11 months ago
2007
IEEE
The sensitivity of very deep submicron designs to supply voltage noise is increasing due to higher path delay variations and reduced noise margins with supply noise scaling. The s...
IJIT
2004
13 years 6 months ago
2004
This paper analyses the performance of a genetic algorithm using a new concept, namely a fractional-order dynamic fitness function, for the synthesis of combinational logic circuit...
HPCA
2008
IEEE
14 years 5 months ago
2008
IEEE
The continued scaling of device dimensions and the operating voltage reduces the critical charge and thus natural noise tolerance level of transistors. As a result, circuits can p...
DDECS
2006
IEEE
13 years 11 months ago
2006
IEEE
- This paper presents a carry lookahead (CLA) circuitry design based on dynamic circuit aiming at delay reduction in addition of BCD coded decimal numbers. The performance of the p...
ISLPED
2000
ACM
13 years 9 months ago
2000
ACM
Processors in portable electronic devices generally have a computational load which has time-varying performance requirements. Dynamic Voltage Scaling is a method to vary the proc...