Sciweavers

Share
VTS   2007 IEEE VLSI Test Symposium
Wall of Fame | Most Viewed VTS-2007 Paper
VTS
2007
IEEE
203views Hardware» more  VTS 2007»
9 years 17 days ago
Multiple Bit Upset Tolerant Memory Using a Selective Cycle Avoidance Based SEC-DED-DAEC Code
Conventional error correcting code (ECC) schemes used in memories and caches cannot correct double bit errors caused by a single event upset (SEU). As memory density increases, mu...
Avijit Dutta, Nur A. Touba
Disclaimer and Copyright Notice
Sciweavers respects the rights of all copyright holders and in this regard, authors are only allowed to share a link to their preprint paper on their own website. Every contribution is associated with a desciptive image. It is the sole responsibility of the authors to ensure that their posted image is not copyright infringing. This service is compliant with IEEE copyright.
IdReadViewsTitleStatus
1Download preprint from source203
2Download preprint from source143
3Download preprint from source135
4Download preprint from source129
5Download preprint from source116
6Download preprint from source114
7Download preprint from source105
8Download preprint from source103
9Download preprint from source102
10Download preprint from source100
11Download preprint from source95
12Download preprint from source89
13Download preprint from source85
14Download preprint from source79
15Download preprint from source71
books