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2007
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Supply Voltage Noise Aware ATPG for Transition Delay Faults

10 years 5 months ago
Supply Voltage Noise Aware ATPG for Transition Delay Faults
The sensitivity of very deep submicron designs to supply voltage noise is increasing due to higher path delay variations and reduced noise margins with supply noise scaling. The supply noise of delay test during at-speed launch and capture is significantly larger compared to normal circuit operation since larger number of transitions occur within a short time frame. Our simulations have shown that for identical switching activity, a pattern with a short switching time frame window will surge more current from the power network, thereby causing higher IR-drop. In this paper, we propose a novel method to measure the average power of at-speed test patterns, referred to as switching cycle average power (SCAP). We present a case study of the IR-drop effects on design performance during atspeed test. A new practical framework is proposed to generate supply noise tolerant delay test patterns. The proposed framework uses existing commercial ATPG tools and a wrapper is added around them. The ...
Nisar Ahmed, Mohammad Tehranipoor, Vinay Jayaram
Added 04 Jun 2010
Updated 04 Jun 2010
Type Conference
Year 2007
Where VTS
Authors Nisar Ahmed, Mohammad Tehranipoor, Vinay Jayaram
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