18 search results - page 1 / 4 » Non-fractional parallelism in LDPC decoder implementations |
VTC
2008
IEEE
13 years 11 months ago
2008
IEEE
—In this paper, we propose a class of implementation friendly structured LDPC codes with low error floors. The proposed codes exhibit no apparent error floors as compared with qu...
DATE
2007
IEEE
13 years 11 months ago
2007
IEEE
Because of its excellent bit-error-rate performance, the Low-Density Parity-Check (LDPC) decoding algorithm is gaining increased attention in communication standards and literatur...
TSP
2008
13 years 4 months ago
2008
Stochastic decoding is a new approach to iterative decoding on graphs. This paper presents a hardware architecture for fully parallel stochastic low-density parity-check (LDPC) dec...
SIPS
2007
IEEE
13 years 11 months ago
2007
IEEE
Stochastic decoding is a new alternative method for low complexity decoding of error-correcting codes. This paper presents the first hardware architecture for stochastic decoding...
SIPS
2006
IEEE
13 years 11 months ago
2006
IEEE
Abstract— In this paper, we propose partly parallel architectures based on optimal overlapped sum-product (OSP) decoding. To ensure high throughput and hardware utilization effi...