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» Normalization at the arithmetic bit level
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DAC
1996
ACM
13 years 9 months ago
Bit-Level Analysis of an SRT Divider Circuit
Abstract-- It is impractical to verify multiplier or divider circuits entirely at the bit-level using ordered Binary Decision Diagrams (BDDs), because the BDD representations for t...
Randal E. Bryant
EURODAC
1995
IEEE
126views VHDL» more  EURODAC 1995»
13 years 9 months ago
Timing optimization by bit-level arithmetic transformations
This paper describes a method to optimize the performance of data paths. It is based on bit-level arithmetic transformations, and is especially suited to optimize large adder stru...
Luc Rijnders, Zohair Sahraoui, Paul Six, Hugo De M...
ICPP
1993
IEEE
13 years 9 months ago
Dependence Analysis and Architecture Design for Bit-Level Algorithms
:. In designing application-specific bit-level architectures and in programming existing bit-level processor arrays, it is necessary to expand a word-level algorithm into its bit-...
Weijia Shang, Benjamin W. Wah
FPL
2007
Springer
190views Hardware» more  FPL 2007»
13 years 11 months ago
Automatic Accuracy-Guaranteed Bit-Width Optimization for Fixed and Floating-Point Systems
In this paper we present Minibit+, an approach that optimizes the bit-widths of fixed-point and floating-point designs, while guaranteeing accuracy. Our approach adopts differen...
William G. Osborne, Ray C. C. Cheung, José ...
ICMCS
2005
IEEE
131views Multimedia» more  ICMCS 2005»
13 years 11 months ago
A New Bit-Plane Entropy Coder for Scalable Image Coding
Compression ratio and computational complexity are two major factors for a successful image coder. By exploring the Laplacian distribution of the wavelet coefficients, a new bit ...
Rong Zhang, Rongshan Yu, Qibin Sun, Wai-Choong Won...