33 search results - page 7 / 7 » On Reducing Register Pressure and Energy in Multiple-Banked ... |
ISCA
2011
IEEE
12 years 8 months ago
2011
IEEE
Conventional high-performance processors utilize register renaming and complex broadcast-based scheduling logic to steer instructions into a small number of heavily-pipelined exec...
DAC
2009
ACM
14 years 5 months ago
2009
ACM
This paper introduces Way Stealing, a simple architectural modification to a cache-based processor to increase data bandwidth to and from application-specific Instruction Set Exte...
MICRO
2003
IEEE
13 years 10 months ago
2003
IEEE
Energy-efficient processor design is becoming more and more important with technology scaling and with high performance requirements. Supply-voltage scaling is an efficient way to...