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» On reducing both shift and capture power for scan-based test...
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DFT
2005
IEEE
132views VLSI» more  DFT 2005»
13 years 8 months ago
Low Power BIST Based on Scan Partitioning
A built-in self-test (BIST) scheme is presented which both reduces overhead for detecting random-pattern-resistant (r.p.r.) faults as well as reduces power consumption during test...
Jinkyu Lee, Nur A. Touba
CVPR
2009
IEEE
15 years 1 months ago
Higher-Order Clique Reduction in Binary Graph Cut
We introduce a new technique that can reduce any higher-order Markov random field with binary labels into a first-order one that has the same minima as the original. Moreover, w...
Hiroshi Ishikawa 0002
ECCV
2006
Springer
14 years 8 months ago
Inter-modality Face Recognition
Recently, the wide deployment of practical face recognition systems gives rise to the emergence of the inter-modality face recognition problem. In this problem, the face images in ...
Dahua Lin, Xiaoou Tang
ICASSP
2011
IEEE
12 years 10 months ago
A method to infer emotions from facial Action Units
We present a robust method to map detected facial Action Units (AUs) to six basic emotions. Automatic AU recognition is prone to errors due to illumination, tracking failures and ...
Sudha Velusamy, Hariprasad Kannan, Balasubramanian...