Sciweavers

43 search results - page 2 / 9
» On the Communication Capability of the Self-Reconfigurable G...
Sort
View
FPL
2000
Springer
95views Hardware» more  FPL 2000»
13 years 8 months ago
It's FPL, Jim - But Not as We Know It! Opportunities for the New Commercial Architectures
Following the simple Programmable Logic Device (SPLD) and Field Programmable Gate Array (FPGA) generations a third generation of programmable logic technologies is now reaching the...
Tom Kean
BIOADIT
2004
Springer
13 years 10 months ago
A Hardware Implementation of a Network of Functional Spiking Neurons with Hebbian Learning
Abstract. In this paper we present a functional model of a spiking neuron intended for hardware implementation. Some features of biological spiking neuabstracted, while preserving ...
Andres Upegui, Carlos Andrés Peña-Re...
INTEGRATION
2008
127views more  INTEGRATION 2008»
13 years 3 months ago
A Viterbi decoder architecture for a standard-agile and reprogrammable transceiver
This paper presents a Viterbi Decoder (VD) architecture for a programmable data transmission system, implemented using a Field Programmable Gate Array (FPGA) device. This VD has b...
Lucia Bissi, Pisana Placidi, Giuseppe Baruffa, And...
ICRA
2007
IEEE
160views Robotics» more  ICRA 2007»
13 years 11 months ago
Morphing Bus: A rapid deployment computing architecture for high performance, resource-constrained robots
— For certain applications, field robotic systems require small size for cost, weight, access, stealth or other reasons. Small size results in constraints on critical resources s...
Colin D'Souza, Byung Hwa Kim, Richard M. Voyles
ARITH
1999
IEEE
13 years 9 months ago
Montgomery Modular Exponentiation on Reconfigurable Hardware
It is widely recognized that security issues will play a crucial role in the majority of future computer and communication systems. Central tools for achieving system security are...
Thomas Blum