115 search results - page 2 / 23 » On the Design of IEEE Compliant Floating Point Units |
FCCM
2003
IEEE
13 years 10 months ago
2003
IEEE
Most commercial and academic floating point libraries for FPGAs provide only a small fraction of all possible floating point units. In contrast, the floating point unit generat...
ICCD
2001
IEEE
14 years 2 months ago
2001
IEEE
ARITH
2009
IEEE
14 years 2 days ago
2009
IEEE
A brief description is provided of the decimal floating-point support available for Intel® Architecture processors, compliant with the IEEE Standard 754-2008 for Floating-Point A...
ARITH
2007
IEEE
13 years 11 months ago
2007
IEEE
The floating-point multiply-add fused (MAF) unit sets a new trend in the processor design to speed up floatingpoint performance in scientific and multimedia applications. This ...
ARITH
1999
IEEE
13 years 9 months ago
1999
IEEE
The floating-point unit of a S/390 CMOS microprocessor is described. It contains a 116 bit fraction dataflow for addition and subtraction and a 64 bit-wide multiplier. Besides the...