39 search results - page 3 / 8 » On the Relation between SAT and BDDs for Equivalence Checkin... |
DATE
2006
IEEE
13 years 11 months ago
2006
IEEE
The problem of diagnosis – or locating the source of an error or fault – occurs in several areas of Computer Aided Design, such as dynamic verification, property checking, eq...
DATE
2007
IEEE
13 years 12 months ago
2007
IEEE
This paper focuses on inductive invariants in unbounded model checking to improve efficiency and scalability. First of all, it introduces optimized techniques to speedup the comp...
ISSTA
2004
ACM
13 years 11 months ago
2004
ACM
Constraints in predicate or relational logic can be translated into boolean logic and solved with a SAT solver. For faster solving, it is common to exploit the typing of predicate...
TVLSI
2008
13 years 5 months ago
2008
ion levels. The framework also supports the generation of test constraints, which can be satisfied using a constraint solver to generate tests. A compositional verification approac...
DATE
2009
IEEE
14 years 11 days ago
2009
IEEE
Equivalence checking and property checking are powerful techniques to detect error traces. Debugging these traces is a time consuming design task where automation provides help. I...