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ISCAS
2003
IEEE
114views Hardware» more  ISCAS 2003»
13 years 10 months ago
On the hardware implementations of the SHA-2 (256, 384, 512) hash functions
Couple to the communications wired and unwired networks growth, is the increasing demand for strong secure data transmission. New cryptographic standards are developed, and new en...
Nicolas Sklavos, Odysseas G. Koufopavlou
WISA
2007
Springer
13 years 11 months ago
Iteration Bound Analysis and Throughput Optimum Architecture of SHA-256 (384, 512) for Hardware Implementations
Abstract. The hash algorithm forms the basis of many popular cryptographic protocols and it is therefore important to find throughput optimal implementations. Though there have be...
Yong Ki Lee, Herwin Chan, Ingrid Verbauwhede
ERSA
2006
89views Hardware» more  ERSA 2006»
13 years 6 months ago
Multi-Mode Operator for SHA-2 Hash Functions
We propose an improved implementation of the SHA-2 hash family to include a multi-mode of operation with minimal latency and hardware requirements over the entire operator. The mul...
Ryan Glabb, Laurent Imbert, Graham A. Jullien, Arn...
FPL
2010
Springer
129views Hardware» more  FPL 2010»
13 years 2 months ago
FPGA Implementations of the Round Two SHA-3 Candidates
Abstract--The second round of the NIST-run public competition is underway to find a new hash algorithm(s) for inclusion in the NIST Secure Hash Standard (SHA-3). This paper present...
Brian Baldwin, Andrew Byrne, Liang Lu, Mark Hamilt...