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RTSS
1994
IEEE
13 years 9 months ago
On-Line Scheduling to Maximize Task Completions
The problem of uniprocessor scheduling under conditions of overload is investigated. The system objective is to maximzze the number of tasks that complete by their deadlines. For ...
Sanjoy K. Baruah, Jayant R. Haritsa, Nitin Sharma
ICDAR
2009
IEEE
14 years 1 days ago
Recognition of On-Line Handwritten Commutative Diagrams
We present a method for the recognition of on-line handwritten commutative diagrams. Diagrams are formed with arrows that join relatively simple mathematical expressions. Diagram ...
Andreas Stoffel, Ernesto Tapia, Raúl Rojas
DSD
2008
IEEE
115views Hardware» more  DSD 2008»
13 years 11 months ago
An Efficient Multiple-Parity Generator Design for On-Line Testing on FPGA
We propose a method to efficiently design a “parity generator”, which is a stand-alone block producing multiple parity bits of a given circuit. The parity generator is designe...
Petr Fiser, Pavel Kubalík, Hana Kubatova
VLSID
2005
IEEE
128views VLSI» more  VLSID 2005»
14 years 5 months ago
On-Line Synthesis for Partially Reconfigurable FPGAs
An important application of dynamically and partially reconfigurable computing platforms is in dynamic task allocation and execution. On-line synthesis, on-line placement and on-l...
Renqiu Huang, Ranga Vemuri
FOCS
1993
IEEE
13 years 9 months ago
Throughput-Competitive On-Line Routing
We develop a framework that allows us to address the issues of admission control and routing in high-speed networks under the restriction that once a call is admitted and routed, ...
Baruch Awerbuch, Yossi Azar, Serge A. Plotkin